Valasek Gábor
1 Kis terem
Shaderoptimalizálás a fordító után: AMD és NVIDIA ISA assembly a gyakorlatban
This talk explores how modern GPUs actually execute carefully written shader code. We will examine AMD RDNA architectures, which also form the basis of the current console generation (PS5 and Xbox Series X), as well as NVIDIA’s Ampere architecture, currently one of the most widely used GPU architectures in PC gaming. We will look at the key similarities between these hardware architectures and the different design choices they make, before using low-level, so-called ISA assembly to trace how operations in high-level shader languages are translated into the elementary instructions actually executed by the GPU. The aim of the talk is not to teach assembly programming, but to develop a more accurate mental model of what happens between shader source code and the programme running on the hardware: how vectorisation, instruction selection, register usage, memory access, parallel execution and control-flow divergence manifest at the hardware level. This perspective can help identify performance issues that may not be apparent from the source code alone, and explain why the same shader can behave differently on AMD and NVIDIA hardware. Finally, we will explore how this knowledge can be applied to AI-assisted programming: how to verify the real cost of generated code, how to give code-generation tools more precise optimisation constraints, and how to distinguish changes that merely look convincing from those that deliver measurable performance improvements.